Fuzzy logic, neural networks, and other parallel, array oriented applications are becoming very popular and important in data processing. Most digital data processing systems today have not been designed with fuzzy logic, neural networks, and other parallel, array oriented applications specifically in mind. Thus there are considerable performance and cost benefits to be gained in designing digital data processing systems which are especially adapted and designed to meet the requirements of fuzzy logic, neural networks, and other parallel, array oriented applications.
Saturation Protection
Certain arithmetic operations, such as addition and subtraction, may result in overflow in either the positive or negative direction. "Overflow" refers to a situation in which the resulting value from the arithmetic operation exceeds the maximum value which the destination register can store (e.g. attempting to store a result of %100000001 in an 8-bit register). "Saturation" or "saturation protection" refers to a method of handling overflow situations in which the value in the register is replaced with an upper or lower boundary value, for example $FF for an 8-bit unsigned upper boundary value. In general, there are two common ways to handle overflow. First, the result may be allowed to roll over, i.e. $01 may be stored in the destination register (non-saturating approach). Second, the result value may be replaced by either an upper bound value or a lower bound value (saturating approach).
A common problem in data processors is the need to perform arithmetic computations on data values which are wider, i.e. have more bits, than can be accommodated by the available registers and by the available Arithmetic Logic Unit (ALU) circuitry. For example, it is not uncommon for a data processor to be required to add two 32-bit data values using a 16-bit ALU. An approach was needed which would efficiently support saturation protection for extended length operations.
Communications Between Data Processors
It is desirable for fuzzy logic, neural networks, and other parallel, array oriented applications to utilize a multi-dimensional array of integrated circuits. Thus, the communications between integrated circuits in fuzzy logic, neural networks, and other parallel, array oriented applications is often quite important.
In some prior art data processing systems, such as, for example the transputer, the communications between integrated circuits is controlled interactively by the execution of instructions within the integrated circuits. Thus one or more instructions are required to transfer data to other integrated circuits, and one or more instructions are required to receive data from other integrated circuits. In yet other prior art data processing systems, such as telephone switching networks and certain computer networks, the data itself which is being transferred contains routing information regarding which integrated circuits are the intended recipients of the data.
The goal for fuzzy logic, neural networks, and other parallel, array oriented applications is to develop an integrated circuit communications technique and an integrated circuit pin architecture which will allow versatile data passing capabilities between integrated circuits, yet which: (1) will not require a significant amount of circuitry external to the array of integrated circuits; (2) will not require significant software overhead for data passing capabilities; and (3) which will require as few dedicated integrated circuit pins as possible.